Join us November 30th 2026 at "Couvents des Cordeliers", in the historical center of Paris

10th anniversary edition of the Workshop

Performance and Scalability of Storage Systems

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Per3S is a french workshop centered on performances of storage system and all the issues related to storage at scale

The terminology used in Per3S for storage includes HPC systems as well as Cloud architectures, the common point between both being scalability. Presentations and talks focus in application, system or architecture. This 10th edition aims to gather during one day researchers from academia and industry, experimented or junior, storage users and customers with the sole purpose to exchange and foster the community.

Overview

Per3S 10th Anniversary Edition

Per3S is a workshop aiming to bring together the scientific and technological storage community to discuss and address issues and challenges associated to performance and data operations at scale. These topics cover HPC storage as well as Cloud-oriented architectures, both sharing the need for extreme scale.

Per3S fully encourages young researchers to present their work by submitting an abstract. The abstract can relate to an original work, on-going work, with fresh problems/solutions, or one already submitted and/or accepted in an international conference in order to be the subject of discussions.

Modality of submissions

Communications and submissions may be made either in French or in English.

Important dates

  • Submission of abstracts from October 15th until November 23rd
  • Two paragraph, a short bio and title of the poster to be sent to: per3s.contact@gmail.com
  • Notifications are made to authors within 3 days of submission
  • Workshop on November 30th

50 Participants

Previous editions of Per3S have successfully fostered a community of researchers both from academia and industry working on storage technologies. The audience is around 50 persons.

4 sessions

The program is organized around 4 sessions: one dedicated to Industrial talks, Storage technologies and data management. In the second session distinguished young researchers present their recent results. Two additional sessions are devoted to academic results from senior researchers. In addition a fourth short session is added to allow students presenting poster to introduce their posters. The posters are displayed and discussed during the buffet.

12 talks, 8 Posters

Each posters is coming with an additional Flash-Presentation. Get within a single day a comprehensive overview of the storage activities in France.

Program

Pers3S workshop spans a full day from 9am to 18h00, with a total of 4 sessions offering the opportunity to meet students, early career researchers, more experiences one and industrial stakeholders.

  • 8h30-9h00 Participants Welcoming
  • 9h00-10h30 Session 1
  • 10h30-11h00 Break
  • 11h00-12h00 Distinguished young researchers
  • 12h00-12h30 Flash presentations to introduce posters
  • 12h30-14h00 ** Lunch and Posters **
  • 14h00-16h00 Session 2
  • 16h00-16h30 Break
  • 16h30-18h00 Session 3
  • 18h00-20h Casual networking at Le 10 bar (5 minutes walk)

9h-10h30 Session 1

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9h30 Amphithéâtre Roussy

Rethinking the I/O Stack: Fast I/O Completion and User-Space Caching

Yu Liang

Fast storage exposes software overhead as a key bottleneck in both direct and buffered I/O. This talk presents UnICom (FAST 2026), which enables efficient direct I/O completion under mixed compute- and I/O-intensive workloads. It then draws on our HotStorage 2026 study to show why small buffered requests are particularly sensitive to software overhead, and to examine the challenges of bringing kernel page-cache benefits to user space.

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10h00 Amphithéâtre Roussy

Carbon Footprint of Storage in Data Centers: the Impact of Using SSDs for Key-Value Stores

Thomas Ropars, INRIA

This presentation analyzes the lifecycle carbon footprint of SSDs versus HDDs for Key-Value stores to determine if SSDs' superior performance offsets their higher manufacturing and energy costs. By measuring hardware power consumption across various workloads, results show that SSDs typically achieve a lower overall carbon footprint due to their high operational energy efficiency. However, HDD-based systems remain the greener choice when SSD capabilities are underutilized or when the data center operates on low-carbon electricity.

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10h00 Amphithéâtre Roussy

PaCaR: Improved Buffered I/O Locality on NUMA Systems with Page Cache Replication

Julien Sopena, LIP6

Multi-socket NUMA systems struggle with high memory access latencies, particularly in highly parallel, I/O-intensive applications where traditional migration techniques fail. To solve this, we introduce PaCaR, a transparent page cache replication mechanism that duplicates cached pages across nodes while ensuring write consistency and adapting to memory pressure without requiring application changes. Evaluations on a dual-socket server show PaCaR boosts performance by up to 1.4x in synthetic workloads and 25% in real-world applications. This paper received the Best Paper Award during EuroSys 2026

program
10h30

** 30 minute break **

11h-12h00 Distinguished Young Researchers

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11h00 Amphithéatre Roussy

THEIA: Scalable and Effective Data Prefetching for Geo-Distributed Erasure-Coded Storage

Marc Tranzer, INRIA

TBA

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11h30 Amphithéâtre Roussy

Impact of interference from concurrent jobs on checkpointing performance

Méline Trochin, INRIA / DDN

I/O has been identified as one of the main bottlenecks in HPC. Among the most I/O-intensive operations is checkpointing, which is necessary to save the state of an application and allow it to be restarted at an advanced stage of computation. However, near the parallel file system, concurrency prevents checkpoint phases from reaching the best I/O performance. In this paper, we study I/O interference in this specific context: we look at performance of a checkpoint phase when faced with different interference patterns, exploring aspects such as scale, number of processes, operation, number of files, etc. Through an extensive experimentation, in two systems, we show the impact of these aspects on checkpoint. Moreover, we show that some configurations --- e.g., an application that does random accesses --- lead to degraded system I/O performance.

program
11h30 Amphithéâtre Roussy

VoliStorM: A Crash-Consistent I/O Cache with Two Kernels Instead of Two Caches

Jana Toljaga, Telecom SudParis

TBA

12h-12h30 Flash presentations poster introduction

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12h00 Amphitéatre Roussy

TBA

TBA

Abstract to be provided

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12h05 Amphitéatre Roussy

TBA

TBA

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12h30

** 90 minute lunch break **

14h00-15h30 Session 2

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14h00 Amphithéatre Roussy

I/O-Cool: Using I/Os for Temperature Regulation When Training on the Edge

Jalil Boukhobza

This paper is motivated by the observation that edge data intensive applications, in particular AI training, alternate between I/O and compute phases. Notably, we found that processor temperatures consistently decrease during the I/O phases, revealing opportunities to optimize thermal behavior. We propose I/O-Cool, a proactive thermal management strategy for I/O–compute alternating edge workloads that leverages I/Os to maximize cooling opportunities while reducing the need for processor frequency reductions during the compute process

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9h00 Amphithéâtre Roussy

NIOVA Distributed Block Storage Architecture

Bernd Schubert, NIOVA

Developing intelligent infrastructure software, high-performance storage systems, and cloud-native solutions for next-generation data centers and accelerated computing

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9h00 Amphithéâtre Roussy

VAST AI OS: an high performance data plaform addressing HPC needs and AI High-Level services Requirements

Sven Breuner, VAST Data

The convergence of High-Performance Computing (HPC) and Artificial Intelligence (AI) demands storage architectures capable of massive throughput, low latency, and robust orchestration. This presentation introduces the VAST AI OS, a next-generation data platform utilizing a Disaggregated and Shared-Everything (DASE) architecture to eliminate data silos and resolve traditional performance-capacity trade-offs. By combining Storage Class Memory (SCM) and QLC flash within a unified multi-protocol namespace, VAST ensures deterministic performance at exabyte scales, optimizes GPU utilization, and seamlessly satisfies the rigorous requirements of modern AI and HPC workloads.

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14h30 Amphitéatre Roussy

TOTO: Transparent I/O Tuning for HPC Applications

Francieli Boito, INRIA

High-performance computing applications rely on parallel file systems, and their I/O performance is strongly affected by configuration parameters such as stripe count. However, the ideal stripe count is highly application- and system-dependent, making it difficult to predict and rarely tuned in practice. As a result, substantial I/O performance potential remains unexplored. We present TOTO, a transparent tool that improves I/O performance without requiring application modifications. TOTO intercepts POSIX calls, characterizes application behavior, and uses a machine learning model to select an appropriate stripe count, even for already opened files. We also introduce an allocation algorithm that balances performance and resource occupation, and describe a methodology for training the model once per system using limited data. Our results show that TOTO can improve I/O performance by up to 4.6 times compared to using a default stripe count, while imposing an overhead of at most 9%. Moreover, compared to the state of the art, TOTO can optimize more applications with a lower resource occupation, which is expected to decrease contention in the I/O infrastructure.

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15h00 Amphitéatre Roussy

TBA

TBA

TBA

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15h30

** 30 minute break **

16h00-18h00 Session 3

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16h00 Amphithéâtre Roussy

TBA

TBA

TBA

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16h30 Amphitéatre Roussy

TBA

TBA

TBA

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17h00 Amphitéatre Roussy

TBA

TBA

TBA

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17h30 Amphitéatre Roussy

Closing Session: Reflection on storage from the last 10 years to the next ones!

TBA

TBA

Steering Committee

Since its inception 10 years ago, Per3S is managed by a steering committee, the committee is fluid and tends to evolve from an edition to the other.

Registration

Per3S is an free-access event however for logistic purpose a registration is kindly requested. Access to the site may require the presentation of an ID.



Provided email addresses will only be used to contact participant for logistic purpose or broadcast last minute changes. The emails addresses will not be kept after the Workshop (GDPR).

Click to Register

Venue

The workshop will be held in Le Couvent des Cordeliers, a historical building from the XVIIth century in the thriving area of Odeon district on the left bank of Paris.

Le Couvent des Cordeliers

15 rue de l'école de Médecine

75006 Paris

In case of issue Jean-Thomas: 06 15 95 63 06

Sponsors

Per3S would like to warmly thanks its sponsors:

https://vastdata.com
https://numpex.org
https://lip6.fr

Past Editions: Read the summary from Per3S 2025! ./material/Per3S_2025.pdf

The presentation of last four editions of PER3S are available at the following addresses.